SIL and PIL Simulations
What Are SIL and PIL Simulations?
与嵌入式编码器®, you can run software-in-the-loop (SIL) and processor-in-the-loop (PIL) simulations of your model. These simulations generate source code for either the top model or part of the model. A SIL simulation compiles and runs the generated code on your development computer. A PIL simulation cross-compiles source code on your development computer, and then downloads and runs the object code on a target processor or an equivalent instruction set simulator.
使用SIL和PIL模拟,您可以:
测试您的模型和生成的代码是否等效。
Observe code coverage.
Perform code execution profiling.
为什么使用SIL和PIL
Through SIL and PIL, you can early on test and fix defects. For example, you can model and test a system component in normal mode. Then, you can reuse your test suites in a SIL or PIL simulation that runs compiled generated code. To check numerical equivalence, you compare normal and SIL or PIL simulation results. You thereby avoid leaving the Simulink®environment to test generated code on a separate infrastructure.
This table describes situations where you can use SIL and PIL.
Situation | Use |
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为正常模式模拟开发的重用测试向量,以验证生成(或旧版)代码的数值输出。例如,重复使用由Simulink Design Verifier™。看What Is Test Case Generation?(Simulink Design Verifier). | SIL and PIL |
Collect metrics for generated code:
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SIL and PIL |
Achieve IEC 61508, IEC 62304, ISO 26262, or DO-178 certification. See嵌入式编码器参考工作流程概述(IEC认证套件)和集成过程的输出测试(DO Qualification Kit). | SIL and PIL |
Without target hardware, get a convenient alternative to PIL. | SIL |
With target hardware, for example, an evaluation board or instruction set simulator:
不rmal simulation techniques do not account for restrictions and requirements that the hardware imposes, such as limited memory resources or behavior of target-specific optimized code. For information about running PIL simulations on specific targets, seeSample Custom Targets(Simulink Coder). |
pil |
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The SIL and PIL simulation modes are not designed for the reduction of model simulation times. If you want to speed up the simulation of your model, use the rapid accelerator mode. For more information, seeWhat Is Acceleration?(金宝app模型)。
How SIL and PIL Simulations Work
In a SIL or PIL simulation, code is generated for either the top model or part of the model. With SIL, this code is compiled for and executed on your development computer. With PIL, the code is cross-compiled for the target hardware and runs on the target processor.
通过一个通信信道,仿真软件发送金宝appimulus signals to the code on your computer or target processor for each sample interval of the simulation.
对于顶部模型,Simulink使用金宝app基础或模型工作区的刺激信号。
如果您仅指定了模型的一部分以在SIL或PIL模式下进行模拟,则该模型的一部分保留在Simulink中,并且未针对模型的该部分生成代码。金宝app通常,您将配置模型的这一部分配置为在硬件上执行软件的测试向量。该模型的这一部分可以代表算法的其他部分或算法运行的环境。
当您的计算机或目标处理器从Simulink接收信号时,处理器将执行SIL或PIL算法进行一个示例步骤。金宝appSIL或PIL算法返回在此步骤中计算出的输出信号,以通过通信通道模拟。金宝app模拟的一个示例周期已完成,Simulink继续进行下一个样本间隔。金宝app该过程不断重复自我,模拟进展。SIL和PIL模拟并非实时运行。在每个示例期间,Simulink和对象代码交换金宝appI/O数据。
SIL和PIL模拟的比较
SIL或PIL模拟的类型 | What Happens in SIL Simulation | 在PIL模拟中会发生什么 |
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Specify through:
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使用由子系统创建的SIL或PIL块。 |
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Code Interfaces for SIL and PIL
执行时,您会生成独立的代码,例如,为单个可部署组件构建顶级模型或右键单击子系统。您可以将独立代码编译并链接到独立的可执行文件中,或将其与其他代码集成在一起。有关独立代码接口的更多信息,请参阅Entry-Point Functions and Scheduling(Simulink Coder).
When you generate code for a referenced model hierarchy, the software generates standalone executable code for the top model and a library module called a模型参考目标对于每个引用模型。当代码执行时,独立执行功能将调用适用的模型参考目标来计算引用的模型输出。有关更多信息,请参阅建立模型参考目标(Simulink Coder).
To integrate generated code with legacy code, use standalone code because the standalone code interface is documented.
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SIL and PIL simulations do not provide direct support for custom code interfaces. You can incorporate these interfaces into Simulink as an S-function, for example, using the Legacy Code Tool,S功能构建器, or handwritten code. Then, you can verify the custom code by using SIL and PIL simulations.
This table provides the interfaces that SIL and PIL simulations generate.
SIL/PIL Simulation | Code Interface |
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Top-model | SIL/PIL模拟生成独立的代码接口。如果存在代码,则仿真调用该模型的独立代码。如果不存在代码,则模拟会生成独立代码。 |
模型block | 如果您设置Code interfaceblock parameter to 如果您设置Code interfaceblock parameter to |
SIL or PIL block | Block uses standalone code interface. |
Scheduling Considerations
Item | 信息 |
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代数循环 | There are algebraic loops that occur in SIL and PIL simulations but not in normal mode simulations:
有关更多信息,请参阅:
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Exported functions in feedback loops | If your model has function-call subsystems and you export a subsystem that has context-dependent inputs (for example, feedback signals), the results of a SIL/PIL simulation with the generated code and the results of the normal mode simulation of your model can differ. One approach to make SIL/PIL and normal mode simulations yield identical results is to use功能通话反馈闩锁blocks in your model. You can make context-dependent inputs become context-independent. 嵌入式编码器generates a warning identifying context-dependent inputs of exported function-call subsystems if you setConfiguration Parameters>Diagnostics>连接性>Context-dependent inputsto one of the following:
有关更多信息,请参阅:
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Imported Data and Function Definitions
Item | 信息 |
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Imported data | 在SIL和PIL模拟中,您可以使用具有导入数据定义的存储类的信号,参数和数据存储。模拟定义了与以下相关的导入数据的存储:
SIL and PIL simulations do not define storage for other imported data. For example, the simulations do not define storage for imported data associated with:
In these cases, define the storage through custom code included by the component under test or through the PIL |
GetSet custom storage class |
SIL and PIL simulations support the |
AUTOSAR Runtime Environment (RTE) | You can use top-model and模型block SIL/PIL and SIL/PIL block simulations to perform model-based testing of an AUTOSAR software component. The generated code for the AUTOSAR software component is linked with a basic component-specific AUTOSAR Runtime Environment (RTE) to create a test application. This application tests AUTOSAR API calls made by the AUTOSAR software component. 不teFor模型block SIL/PIL, to test the AUTOSAR interface, set theCode interfaceblock parameter to 有关更多信息,请参阅Verify AUTOSAR C Code with SIL and PIL。 |